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Zhai Wei, Ji Yuanfa, Sun Xiyan, Xu Yaning. Design of a high-speed serial data acquisition system based on FPGA[J]. Journal of Guilin University of Electronic Technology, 2013, 33(4): 275-278.
Citation: Zhai Wei, Ji Yuanfa, Sun Xiyan, Xu Yaning. Design of a high-speed serial data acquisition system based on FPGA[J]. Journal of Guilin University of Electronic Technology, 2013, 33(4): 275-278.

Design of a high-speed serial data acquisition system based on FPGA

  • In order to achieve high-speed data acquisition and analysis, a high-speed data acquisition system is designed by adopting serial port transmission technique and using FPGA as the central logic control module. The design uses the AD9233 analog-to-digital conversion chips and CycloneII series FPGA chip. The design of the FPGA module adopts the Verilog-HDL. Software design and timing simulation are achieved in QuartusII and ModelSim. The system is verified to have high stability, high real-time performance and high precision in GPS signal acquisition experiment.
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