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徐江, 段吉海, 符征裕, 崔鹏, 黄秀玲. 一种低温漂系数的高性能基准电压源[J]. 桂林电子科技大学学报, 2021, 41(1): 25-30.
引用本文: 徐江, 段吉海, 符征裕, 崔鹏, 黄秀玲. 一种低温漂系数的高性能基准电压源[J]. 桂林电子科技大学学报, 2021, 41(1): 25-30.
XU Jiang, DUAN Jihai, FU Zhengyu, CUI Peng, HUANG Xiuling. A high performance voltage reference with low drift coefficient[J]. Journal of Guilin University of Electronic Technology, 2021, 41(1): 25-30.
Citation: XU Jiang, DUAN Jihai, FU Zhengyu, CUI Peng, HUANG Xiuling. A high performance voltage reference with low drift coefficient[J]. Journal of Guilin University of Electronic Technology, 2021, 41(1): 25-30.

一种低温漂系数的高性能基准电压源

A high performance voltage reference with low drift coefficient

  • 摘要: 为了在宽温度范围内得到较低温漂系数的输出电压,设计了一种电压补偿模式结构的高精度基准电压源,采用栅源电压差分对作差的方式对该基准电压进行温度补偿。MOS管线性区电阻在工作在亚阈值区的2个MOS管的栅源电压差作用下,产生温漂系数较低的偏置电流,通过不同标准电压下的晶体管产生基准电压。基于180 nm CMOS器件模型,在cadence上对电路进行设计仿真和对比分析。结果表明,在温度为-25~150 ℃时,温度系数为3.91 ppm/℃;在1.3~3.3 V电源电压范围内,电压调整率达到0.58%;在100 Hz时,电源抑制比为-63.5 dB;功耗仅为115.7 nW,芯片面积为0.005 4 mm2

     

    Abstract: To achieve a low temperature coefficient (TC) in a wide temperature range, a high precision voltage reference source with voltage compensation mode structure was designed, The temperature of the reference voltage was compensated by the difference of the gate source voltage differential pairs. Under the effect of the gate source voltage difference between the two MOS transistors working in the sub-threshold region, the resistance in the linear region of MOS transistors generates a bias current with low temperature drift coefficient, and the reference voltage was generated by transistors under different standard voltages. Based on the 180nm CMOS device model, the circuit was designed, simulated and compared on cadence. The results show that when the temperature was -25 ℃ to 150 ℃, the temperature coefficient was 3.91 ppm /℃; and the voltage line regulation reached 0.58% in the range of 1.3 V to 3.3 V supply voltage; At 100 Hz, the PSRR is -63.5 dB; the power dissipation was only 115.7 nW, and the chip area was 0.0054 mm2.

     

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